Some computing platforms that have high performance requirements also have significant power constraints. For example, portable computing devices such as cell phones, tablets, and laptops occasionally run processing intensive applications such as video applications, gaming applications, and so on. However, it is imperative that such devices consume as little power as possible to provide a long battery life between charges.
To address this issue, conventional portable devices employ different power modes whereby a device switches between a high power mode and a low power mode depending on whether significant processing resources are currently required. To facilitate these different power modes, a device may restrict the use of high speed data transfers to the high power mode, and use lower data transfer speeds during the low power mode since lower data transfer speeds generally result in lower power consumption. Since mobile devices conventionally use uncalibrated and unterminated signaling, the switching between different data transfer rates is done relatively quickly and, as a result, does not generally result in a latency penalty.
As the performance capabilities of mobile devices increase, there is a corresponding need to support higher speed data transfers. Higher data transfer speeds are achieved through the use of wider data busses and/or faster signaling rates. In certain platforms, the use of faster signaling rates is preferred due to disadvantages that are associated with the use of wider data busses. For example, a portable device may employ a system-on-a-chip (SoC) that maintains data in a separate integrated circuit. In such a case, it is desirable to have a low pin count and hence, narrower data busses, so that the sizes of the integrated circuits are kept as small as possible. Moreover, the use of a larger number of off-chip links (e.g., signal paths) generally results in higher power consumption.
To meet the stricter timing requirements associated with the use of higher signaling rates, calibrated and terminated signaling may be employed. However, the use of calibrated and terminated signaling may cause latency issues in implementations that switch between different signaling rates to accommodate different power modes. For example, it may take 300 nanoseconds or longer to recalibrate a link. As a result, the latency associated with calibrating a link for a new signaling rate may exceed the maximum latency period of applications that have high quality of service (QoS) requirements. Consequently, there is a need for improved data transfer techniques that are able to support high performance data transfers while also facilitating low power consumption.
In accordance with common practice the various features illustrated in the drawings may not be drawn to scale. Accordingly, the dimensions of the various features may be arbitrarily expanded or reduced for clarity. In addition, some of the drawings are simplified for clarity. Thus, the drawings may not depict all of the components of a given apparatus or method. Finally, like reference numerals are used to denote like features throughout the specification and figures.